A 3rd World Embedded Engineer Responds to "RISC-V They Should Have Known Better"

I think he's kind of speaking past the original author. The original piece is basically about how the author doesn't think that RISC-V will take off outside embedded, because of some design decisions that lead to poor performance compared to ARM64 and because so much of the ISA being optional means that there's too much fragmentation to make binary distribution feasible. Meanwhile, this piece is mainly about how RISC-V is great for embedded because companies can build it into custom chips with specifically the functionality they need, and because of how cheap it is for low-end use cases since there's no license fees.The only real point of contention I see between the two is that this piece goes on to talk about how it's a selling point that RISC-V can be used for both low-end 10 cent microcontrollers, and high-end multi-core processors running Linux. Personally I don't see the benefit of this since you're going to have to recompile your software anyway, and since all the RISC-V SBCs I'm aware of have significantly worse performance and efficiency than comparably priced ARM SBCs. reply:...

I believe there will come a day when RISC-V has comparable or better performance than ARM and x86_64.This is based on history: I remember when x86 performance compared to the DEC Alpha, PA-RISC, SPARC, etc. was a joke. There was a time when, if you wanted real performance, you needed to pony up $20,000-$50,000 for a workstation with a MIPS/PA-RISC/SPARC/Alpha/whatever processor. All these workstations smoked the x86 computers of the era.However, people were buying x86 computers at a far higher rate, giving Intel (and AMD) the money needed to invest in better chip designs and better fabs. Linux was, at the same time, gaining traction and, around the time the dot-com bubble popped and there were no longer companies with the money needed to get Sun SPARC workstations (or what not) at $50,000 or more a pop to start up a web business, x86 computers running Linux had nearly the same performance at a much lower price. Once the Itanium sank and x86_64 was mainstream, x86_64 was the ISA of choice for performance workstations and servers, and the RISC ISAs that survived were now mainly used in the embedded space....

I don't really understand the author's conclusions about cost and shipping, and how RISC-V is cheaper and more accessible to people outside the US and Europe. He first talks about how getting $1 worth of chips can cost $60-$200 in shipping for him due to his location... but then by the end claims that RISC-V gives him "an architecture that arrives in my country at ten cents a part".I don't get how both things can be true. The cost to ship something to Trinidad and Tobago has nothing to do with whether it's ARM or RISC-V; shipping the same weight of either kind of chips should cost exactly the same amount. Yes, maybe the chip cost itself of a particular ARM-based model is $0.15 while the equivalent RISC-V chip costs $0.10, but if the issue (for him and other people who live outside US/Europe) is that shipping costs are orders of magnitude more expensive than the thing being shipped, that chip-cost difference becomes irrelevant.I think he does make a great point about how fragmentation does give you better optionality:... reply: He's saying that shipping from the big western parts suppliers (Digikey, Mouser, Segger) costs a lot of money....

He says:> From that position, the difference between a ten cent part and a one dollar part is not a rounding error and it is not a detail you get to wave past on the way to the interesting discussion about encodingsYet earlier:> I pay anywhere from US $60 to US $200 to ship one dollar chips that people everywhere else get free shipping onSeems to me that the difference between a 10c chip and a $1 chip are a rounding error when the shipping cost dominates so much? reply: He explains the difference here:> I can pick up H417s on the official WCH store on Aliexpress with free shipping and no verification hullabalu.I think the point is that anyone can make these chips, so there are Chinese sellers who just throw them in a padded envelope and send them out without bothering with all the stuff "serious" vendors do. And because they're cheap enough, if doesn't matter if some get lost in the mail.

I love the article, it's a breath of fresh air compared to the usual bay area centric takes. However there's just one issue:> The students I want to teach are in the same position, and so are the ones in Nigeria and BangladeshIt does not take $60 to ship small sub $1 chips from Asia to Nigeria/Bangladesh. These two countries are all on global trade routes (both supply and demand) and the expensive last mile delivery costs are fairly low there too. reply: This is a bay area centric take on a non bay area centric take.The typical bay area centric take has the following vibe:1. I am among the group of most open minded people2. I admit mistakes, but I don't change my view, that means I may make the same mistakes next time on a different concrete cases3. Morally I am among the least corrupted4. I work for the moderately morally questionable firms with nice paychecks, but my moral views are not tainted a bit5. I never think on the other's perspectives

I disagree with some points in "RISC-V They Should Have Known Better".For example, author claims that saving and restoring all registers in interrupt handler takes too long. But this can be solved alternatively, for example: split register set for use in interrupt and normal code. Or simply add two register banks and allow switching between them (assuming interrupts are not re-enterable). But author claims that ARM is better because it has a "store multiple registers" instruction. It wouldn't help because storing multiple registers still requires multiple bus cycles, and microcontroller probably has a 32-bit bus and no cache, so saving N registers requires N memory cycles - no matter, is it done with a single instruction (ARM), or with multiple (RISC-V). And implementing this ARM instruction makes the core more complicated with little benefit.As for 3 instructions for array access, in a simple loop a compiler can convert index access to pointer increment.The real weak points of RISC-V are:- no trap on integer overflow and invalid FP results ....

> He derives the case for the chip and then spends the rest of the article annoyed that the chip exists. This is almost satirical.His criticisms are entirely valid, because why can't the the thing that has a free spec and will likely dominate that space ... also be good too? Can't we have all the nice things? reply: Because 'good' is rather subjective when it comes to ISAs.

I lost the thread of his argument when he brought up the shipping expense:> I pay anywhere from US $60 to US $200 to ship one dollar chips that people everywhere else get free shipping onthen follows with:> the difference between a ten cent part and a one dollar part is not a rounding error and it is not a detail you get to wave past on the way to the interesting discussion about encodings.When shipping is so expensive, doesn't the difference between $1 and $.10 unit cost become less relevant?

To me it feels like the difference in positions is "this could be made better" vs. "but this is already so much better than before". Both are right.Maybe I'm missing something important so far...

Nice read!Though it feels a bit strange that "I have exceeded the allowed number of requests. (500 times)" when I first clicked the article and I'm pretty sure I don't share the ip of my self-hosted VPN with anyone.

Working archived copy - https://archive.is/9FaRC

My perspective using Nix is that it's hardly worth standardizing ISAs. Recompiling software is easy and we should have a Cambrian explosion of different designs.This is especially good if one scopes out a family of ISAs that are ABI compatible such that one can compile down to a semi-pre-optimized portable IR, and just do the last bit per ISA.

Original HN discussion referenced:https://news.ycombinator.com/item?id=49298035

I don't think the Author disagree with what the original article wrote. If anything everything he said seems to reassert what the original article intended to state.And while things has died down a lot in the past few years, there is a reason why I wrote the line."You do not criticise The Rusted Holy Grail and the Riscy Silver Bullet."

This is the sort of content I endure this place for. Thanks for posting.

>He derives the case for the chip and then spends the rest of the article annoyed that the chip exists.>This is almost satirical.That's all that needs to be said.It's like comparing Unity and Godot. Unity is better in every single way but one, you have to license it from a very poorly ran company.You don't "own" your games, they ship with black box spyware. The pricing for using it can change from day to day.I swear the Unity C level employs a Magic 8 Ball and consults it for key management decisions.If you need to edit the Unity Engine source code your looking at a secret additional licensing fee which is certainly unaffordable for hobbyist and most indies.Vs Godot which is completely free under the MIT license.Everything about the above can be said for ARM as well.RISC-V is free for everyone to play with. If you think it sucks you can always fork it and jerryrig it to work on existing hardware.If you have money you can even get custom hardware for your forked RISC-V.I very much enjoyed reading this article, I'm optimistic in seeing what OPs students come up with. This is life changing technology that's essentially available to all.

Who uses the term '3rd world' 'third world' anymore?

"Now price the same journey on the other side, forget x86-64 and that duopoly, patent minefield, with multi-thousand dollar debug probes; we'll take a look at ARM."The 386 and 486 patent should have expired more than 20 years ago. No one tried to open source it. https://github.com/EI2030/Low-power-E-Paper-OS/blob/master/0... There were many companies that had clones in the early 90s, and I wonder whether any of them still have the rights to manufacture them." That is a better reason than elegance. and I want to tell Mr Grinberg, that the word priviledge he tosses around in his article also extends beyond the ISA depending on where you are in the world."Grinberg is an emigre from Ukraine, which isn't the most privileged place in the world. In fact his research articles go deeper than the average software developer in Silicon Valley.

I think I figured it out: there's wrought iron over the window...

Rate Limit Exceeded Too Many RequestsYou have exceeded the allowed number of requests. Your Requests: 500. Request Limit: 500 per minute. Tip: Please wait 60 seconds before trying again.A 3rd World Embedded Engineer Learns About Caching Generated HTML The Hard Way.https://archive.md/9FaRC

I have no idea what's going on here, but the title alone gave me second-hand engineering stress. Solid post.

High shipping costs are the reason why many countries in the Caribbean and Latin America usually have freight forwarders They locally market themselves as package lockers, po boxes or online shopping companies. It turns out the expensive shipping cost doesn't scale linearly with package size or weight. The expensive shipping cost is a base price, and only rises slowly with package weight and size.So, these freight forwarders rent a warehouse in the US, an LLC in the US for paying rent, and give away the address of the warehouse to their customers locally. Customers use the address when shopping online and their packages are dropped off at the warehouse. Then they employ people in the US to collect customer packages in the US into large bags, which are then shipped to the destination country via DHL.DHL does charge the exorbitant shipping to third world country fees of 35 to 60 to 200 dollars that people here complain about....

That is just an amazing website and initiative.https://rvembedded.com/products/project-lab/Definitely interested!

You have exceeded the allowed number of requests.Your Requests: 500 Request Limit: 500 per minute

You have exceeded the allowed number of requests.Your Requests: 500 Request Limit: 500 per minutewith no vpn

"Rate Limit Exceeded"Does anyone have an archive?

This blog post is very defensive and argumentative, which I guess is fair considering Dmitry's post is similarly inflammatory, but most of it was really not convincing:> Simply put, the things a high-end CPU needs are diametrically opposed to the things a small cost-saving microcontroller core needs.> The conclusion he draws is that no single ISA can serve both ends, and that RISC-V fans are fooling themselves, in theory the premise is true. The conclusion does not follow, and I can show you why from three parts sitting on my desk as we speak.> CH32V003. This is the cheap "RV32EC" with sixteen registers, no multiplier, no divider, machine mode only,> CH32H417. A dual core MCU that is unmatched in performance to price point and is at the higher end of the MCU line> Baochip. A VexRISC-V with an MMU built around a stack thats open from silicon to os Baochip-1x: A Mostly-Open, 22nm SoC for High Assurance ApplicationsUh, which one of these is a datacenter server cpu? Or a workstation cpu? Or at least a developer laptop cpu?...

Beautiful.I read the "They Should Have Known Better" article and forgot it. I've seen this before. I know it's hot air and does not matter, and I can't afford to worry about things that don't matter.When I say I've seen this before, I'm talking about ancient history: controversies so old and so laughable that they've been forgotten. When, for example, AMD handed the world AMD64/X86_64, the same things were said: fragmentation, legacy+flawed ISA, etc. That has not aged well, and "They Should Have Known Better" won't either.The "fragmentation" argument has no merit. The jumble of extension names and profiles in RISC-V are, in fact, direct evidence that RISC-V is succeeding: it's the RISC-V ecosystem aggressively, collaboratively and successfully tackling pain points and solving them. This is what RISC-V is supposed to be doing, and it's doing it, and empires are being built on it.Take this part: "The existence of CLIC and various proprietary 'fast IRQ' / auto-stacking extensions is an additional indictment."CLIC is miraculous. It's an advanced embedded interrupt controller, and it's wonderful: it brings the equivalent of ARM's NVIC to RISC-V, except better....